Competitive pressure for higher performance systems drives electronic product designers to strive for solutions with higher density and higher efficiency in a reduced size. To achieve these goals designers often look to avoid multiple conversion stages between the system supply and point of load. However this means that Non-isolated Point of Load Regulator (niPOL) are being asked to handle higher input voltages and conversion ratios than ever before, while operating at higher power levels from less space.
The power industry has traditionally responded by offering technology upgrades such as improvements in device packaging, silicon integration and MOSFET technology; however these solutions’ efficiency and throughput power diminish as the conversion ratio increases. Other changes to the power train have realised only incremental improvements, sometimes with additional design complexities.
Problems arise because the best way to reduce size is to increase switching frequency. Doing this with today’s hard switching buck conversion topology causes frequency and voltage dependent switching losses. Also, even with newer, faster-switching devices, hard switching usually results in switch mode spiking and ringing as well as EMI and gate drive corruption – and these problems are magnified at higher input voltage and frequency.
MOSFET physics create further problems too. Body diode switching usually involves some conduction time before the high side MOSFET turns on, and also after the synchronous MOSFET turns off. This is detrimental to high efficiency and limits the switching frequency range. Higher frequency MOSFET switching also increases gate drive losses.
A ZVS Buck converter topology addresses these issues. The zero voltage switching design achieves very high power density, efficiency, throughput power capability and wide dynamic range by reducing the effects of the operational challenges described above. Schematically, ZVS topology is identical to a conventional buck converter’s, with the addition of a clamp switch across the output inductor. This allows the inductor stored energy’s use in implementing Zero Voltage Switching.
Simulations run by Vicor show that this topology overcomes the high frequency switching limitations of conventional buck converters in several important ways. The introduction of a clamp phase into the switching action eliminates body diode conduction delays, while turn-on losses are virtually eliminated. The ZVS action also allows the converter’s high side MOSFET gate driver to be smaller and less power-hungry. Turn-on is also easier, allowing for smoother waveform and less noise.
The PI33XX family of wide input range DC-DC converters integrates this ZVS Buck topology with Vicor’s high performance silicon architecture. Implemented in 10×14 mm SIP packages, they become a complete power supply with the addition of an output inductor and a few ceramic capacitors. The high switching frequency allows very small inductors, and the total solution size to be smaller (25×21.5 mm) than competitive integrated solutions, while producing up to 120 W output power with 98% peak efficiency. With a 20 ns minimum on time, the PI33XX can operate from 36 V input to 1 V output at 10 A load. Efficiency exceeds 86% with no reduction of output current over output voltages ranging from 1 V to 15 V.